.section	__TEXT,__text,regular,pure_instructions
	.build_version macos, 11, 0	sdk_version 11, 3
	.globl	__Z17PackedCompareF32_P6Vec128RKS_S2_ ; -- Begin function _Z17PackedCompareF32_P6Vec128RKS_S2_
	.p2align	2
__Z17PackedCompareF32_P6Vec128RKS_S2_:  ; @_Z17PackedCompareF32_P6Vec128RKS_S2_
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #32                     ; =32
	.cfi_def_cfa_offset 32
	str	x0, [sp, #24]
	str	x1, [sp, #16]
	str	x2, [sp, #8]
	; InlineAsm Start

	ld1.4s	{ v0 }, [x1]	; v0 = a           
	ld1.4s	{ v1 }, [x2]	; v1 = b           
	fcmeq.4s	v2, v0, v1	; packed a == b    
	st1.4s	{ v2 }, [x0], #16	; [x0]=v2; x0+=16  

	mvn.16b	v2, v2	; packed a !=b     
	st1.4s	{ v2 }, [x0], #16	; [x0]=v2; x0+=16  

	fcmgt.4s	v2, v0, v1	; packed a > b     
	st1.4s	{ v2 }, [x0], #16	; [x0]=v2; x0+=16  

	fcmge.4s	v2, v0, v1	; packed a >= b    
	st1.4s	{ v2 }, [x0], #16	; [x0]=v2; x0+=16  

	fcmgt.4s	v2, v1, v0	; packed a < b     
	st1.4s	{ v2 }, [x0], #16	; [x0]=v2; x0+=16  

	fcmge.4s	v2, v1, v0	; packed a <= b    
	st1.4s	{ v2 }, [x0], #16	; [x0]=v2; x0+=16  

	fcmlt.4s	v2, v0, #0.0	; packed a < 0     
	st1.4s	{ v2 }, [x0], #16	; [x0]=v2; x0+=16  

	fcmgt.4s	v2, v1, #0.0	; packed b > 0     
	st1.4s	{ v2 }, [x0], #16	; [x0]=v2; x0+=16  

	; InlineAsm End
	add	sp, sp, #32                     ; =32
	ret
	.cfi_endproc
                                        ; -- End function
	.globl	__Z17PackedCompareF64_P6Vec128RKS_S2_ ; -- Begin function _Z17PackedCompareF64_P6Vec128RKS_S2_
	.p2align	2
__Z17PackedCompareF64_P6Vec128RKS_S2_:  ; @_Z17PackedCompareF64_P6Vec128RKS_S2_
	.cfi_startproc
; %bb.0:
	sub	sp, sp, #32                     ; =32
	.cfi_def_cfa_offset 32
	str	x0, [sp, #24]
	str	x1, [sp, #16]
	str	x2, [sp, #8]
	; InlineAsm Start

	ld1.2d	{ v0 }, [x1]	; v0 = a           
	ld1.2d	{ v1 }, [x2]	; v1 = b           
	fcmeq.2d	v2, v0, v1	; packed a == b    
	st1.2d	{ v2 }, [x0], #16	; [x0]=v2; x0+=16  

	mvn.16b	v2, v2	; packed a !=b     
	st1.2d	{ v2 }, [x0], #16	; [x0]=v2; x0+=16  

	fcmgt.2d	v2, v0, v1	; packed a > b     
	st1.2d	{ v2 }, [x0], #16	; [x0]=v2; x0+=16  

	fcmge.2d	v2, v0, v1	; packed a >= b    
	st1.2d	{ v2 }, [x0], #16	; [x0]=v2; x0+=16  

	fcmgt.2d	v2, v1, v0	; packed a < b     
	st1.2d	{ v2 }, [x0], #16	; [x0]=v2; x0+=16  

	fcmge.2d	v2, v1, v0	; packed a <= b    
	st1.2d	{ v2 }, [x0], #16	; [x0]=v2; x0+=16  

	fcmlt.2d	v2, v0, #0.0	; packed a < 0     
	st1.2d	{ v2 }, [x0], #16	; [x0]=v2; x0+=16  

	fcmgt.2d	v2, v1, #0.0	; packed b > 0     
	st1.2d	{ v2 }, [x0], #16	; [x0]=v2; x0+=16  

	; InlineAsm End
	add	sp, sp, #32                     ; =32
	ret
	.cfi_endproc
                                        ; -- End function
.subsections_via_symbols